Microarchitecture

  • Defines how the CPU implements the ISA internally: pipelines, execution units, caches, reorder buffers, branch predictors, register files, etc.

  • Two CPUs can share the same ISA but have completely different microarchitectures.

  • This is the level that actually includes:

    • pipelines

    • out-of-order execution

    • branch prediction

    • caches

    • execution units

    • reorder buffers

    • µop translation

  • Example

    • Same ISA, but internally they are very different machines; they have different pipelines, use different branch predictors, have different cache hierarchies.

    • x86-64:

      • Intel Skylake

      • AMD Zen

    • ARM:

      • Cortex-A78

      • Apple M1

    • RISC-V

      • Rocket

      • BOOM